Thursday, August 23, 2012

Raspberry Pi - Why 74HC14N (or other "buffer" Chip)?

** UPDATED Aug 28, 2012**

The reason for putting a buffer chip between the rPI GPIO pin and external electronics is not only convert the 3.3 to 5 volt (or other) logic levels, but protect it from mistakes like applying a high logic level when the chip is configured as an output (some chips are designed to handle this, other are not). Static discharges are also a concern. 

When I mentioned using a 74HC14N to interface to the rPI, reader commented "Amazing that because of these 'new' 3.3v parts we're having to resort to these old 74HCxx parts".

Yes, it IS an old part, but there is a LOT of inertia around 7400 class parts, and a LOT of derivative types like the 74HCXX parts. As this article states "Several generations of pin-compatible descendants of the original family have since become de-facto standard electronic components"

You can get the pinouts and more info for the 74HC14N here. Note that it is a "Hex inverter" which means that it has 6 inverters in the package, and as a bonus it has a Schmitt trigger input, which will tend to clean up slower transitioning signals is you are using them as an input buffer.

The author of the referenced article also stated that there are modern parts that will do the trick, but if you have the old parts hanging around in your junkbox, or you can get them from an eBay seller, then they are fine.

The other issue of course if getting standard DIP parts as so many new components are surface mount , and are difficult or impossible to breadboard with a proto board.

No matter how complex the main chips, unless you have a circuit specifically designed for a project, you always need some "glue chips" to interface things together.

Some of you have worked with Microchip PIC chips which seem quite robust (I have have accidentally drawn a static spark after walking across a dry rug from a screwdriver tip directly to a PIC I/O pin and it continued to work ok). I suspect that the PIC chips have a lot less (relative) complexity than the Broadcom SOC, so I also suspect that the PIC chips have more room to put I/O buffers, protection diodes, etc. which is needed for the type of apps they are used in.  The SOC is normally buried in a phone or tablet so probably brings out more or less the raw gate output, with less protection I imagine. 

So I am working very carefully around the rPI GPIO pins because of that  :-)


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